Refactor I2C SMBUS
Add SI7021 chipset, partially done.
This commit is contained in:
@ -122,6 +122,5 @@ void mgos_i2c_close(struct mgos_i2c *conn);
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struct mgos_i2c *mgos_i2c_get_global(void);
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// User contributed!
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int get_i2c_register(struct mgos_i2c *i2c, uint8_t addr, uint8_t reg, uint8_t *val);
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bool mgos_i2c_open(int busnr);
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19
src/main.c
19
src/main.c
@ -23,15 +23,19 @@ void i2c_scanner(struct mgos_i2c *i2c) {
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}
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bool i2c_dumpregs(struct mgos_i2c *i2c, uint8_t i2caddr) {
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uint8_t reg, value;
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uint16_t reg;
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int value;
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for(reg=0; reg<255; reg++) {
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if (0 != get_i2c_register(i2c, i2caddr, reg, &value)) {
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LOG(LL_ERROR, ("Could not read register"));
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for(reg=0; reg<256; reg++) {
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value=mgos_i2c_read_reg_b(i2c, i2caddr, reg);
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if (value<0) {
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printf(" XX");
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} else {
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LOG(LL_INFO, ("reg=%u value=%u", reg, value));
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printf(" %02x", value);
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}
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if (reg%16==15) printf("\n");
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}
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printf("\n");
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return true;
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}
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@ -82,9 +86,12 @@ int main() {
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}
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i2c_scanner(i2c);
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// i2c_dumpregs(i2c, 0x76);
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for (;;) {
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sht31(i2c, 0x44);
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si7021(i2c, 0x44);
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// i2c_dumpregs(i2c, 0x40);
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si7021(i2c, 0x40);
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sleep(1);
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}
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178
src/mgos_i2c.c
178
src/mgos_i2c.c
@ -89,117 +89,80 @@ bool mgos_i2c_set_freq(struct mgos_i2c *i2c, int freq) {
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}
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int mgos_i2c_read_reg_b(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg) {
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uint8_t data;
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uint8_t value;
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if (!i2c) {
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LOG(LL_ERROR, ("No I2C bus"));
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if (!mgos_i2c_read_reg_n(i2c, addr, reg, 1, &value))
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return -1;
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}
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if (ioctl(i2c->fd,I2C_SLAVE,addr) < 0) {
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LOG(LL_ERROR, ("Cannot select slave 0x%04x on I2C bus: %s", addr, strerror(errno)));
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return -1;
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}
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if (1 != write(i2c->fd, ®, 1)) {
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LOG(LL_ERROR, ("Cannot select register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return -1;
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}
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if (1 != i2c_read_timeout(i2c, &data, 1)) {
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LOG(LL_ERROR, ("Cannot read register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return -1;
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}
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return data;
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return value;
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}
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int mgos_i2c_read_reg_w(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg) {
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uint16_t data;
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uint16_t value;
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uint8_t data[2];
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if (!i2c) {
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LOG(LL_ERROR, ("No I2C bus"));
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if (!mgos_i2c_read_reg_n(i2c, addr, reg, 2, data))
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return -1;
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}
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if (ioctl(i2c->fd,I2C_SLAVE,addr) < 0) {
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LOG(LL_ERROR, ("Cannot select slave 0x%04x on I2C bus: %s", addr, strerror(errno)));
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return -1;
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}
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if (1 != write(i2c->fd, ®, 1)) {
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LOG(LL_ERROR, ("Cannot select register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return -1;
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}
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if (2 != i2c_read_timeout(i2c, &data, 2)) {
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LOG(LL_ERROR, ("Cannot read register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return -1;
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}
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return data;
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value=(data[1]<<8)+data[0];
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return value;
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}
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bool mgos_i2c_read_reg_n(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg, size_t n, uint8_t *buf) {
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uint8_t outbuf;
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struct i2c_rdwr_ioctl_data packets;
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struct i2c_msg messages[2];
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if (!i2c) {
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LOG(LL_ERROR, ("No I2C bus"));
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return false;
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return -1;
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}
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if (ioctl(i2c->fd,I2C_SLAVE,addr) < 0) {
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LOG(LL_ERROR, ("Cannot select slave 0x%04x on I2C bus: %s", addr, strerror(errno)));
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return false;
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return -1;
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}
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if (1 != write(i2c->fd, ®, 1)) {
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LOG(LL_ERROR, ("Cannot select register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return false;
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}
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if (n != i2c_read_timeout(i2c, buf, n)) {
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LOG(LL_ERROR, ("Cannot read %lu bytes at register 0x%02x on device 0x%04x: %s", n, reg, addr, strerror(errno)));
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return false;
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}
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return true;
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}
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/*
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* In order to read a register, we first do a "dummy write" by writing
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* 0 bytes to the register we want to read from. This is similar to
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* the packet in set_i2c_register, except it's 1 byte rather than 2.
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*/
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outbuf = reg;
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messages[0].addr = addr;
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messages[0].flags = 0;
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messages[0].len = sizeof(outbuf);
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messages[0].buf = &outbuf;
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bool mgos_i2c_write_reg_b(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg, uint8_t value) {
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uint8_t data[2];
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/* The data will get returned in this structure */
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messages[1].addr = addr;
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messages[1].flags = I2C_M_RD/* | I2C_M_NOSTART*/;
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messages[1].len = n;
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messages[1].buf = buf;
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if (!i2c) {
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LOG(LL_ERROR, ("No I2C bus"));
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/* Send the request to the kernel and get the result back */
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packets.msgs = messages;
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packets.nmsgs = 2;
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if(ioctl(i2c->fd, I2C_RDWR, &packets) < 0)
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return false;
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}
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if (ioctl(i2c->fd,I2C_SLAVE,addr) < 0) {
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LOG(LL_ERROR, ("Cannot select slave 0x%04x on I2C bus: %s", addr, strerror(errno)));
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return false;
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}
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data[0]=reg;
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data[1]=value;
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if (2 != write(i2c->fd, data, 2)) {
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LOG(LL_ERROR, ("Cannot write to register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return false;
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}
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return true;
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}
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bool mgos_i2c_write_reg_w(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg, uint16_t value) {
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uint8_t data[3];
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uint8_t data[2];
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data[0]=value>>8;
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data[1]=value&0xFF;
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if (!i2c) {
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LOG(LL_ERROR, ("No I2C bus"));
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return false;
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}
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return mgos_i2c_write_reg_n(i2c, addr, reg, 2, data);
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}
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if (ioctl(i2c->fd,I2C_SLAVE,addr) < 0) {
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LOG(LL_ERROR, ("Cannot select slave 0x%04x on I2C bus: %s", addr, strerror(errno)));
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return false;
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}
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data[0]=reg;
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data[1]=(uint8_t)(0xFF & (value >> 0));
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data[2]=(uint8_t)(0xFF & (value >> 8));
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if (3 != write(i2c->fd, data, 3)) {
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LOG(LL_ERROR, ("Cannot write to register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return false;
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}
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return true;
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bool mgos_i2c_write_reg_b(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg, uint8_t value) {
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return mgos_i2c_write_reg_n(i2c, addr, reg, 1, &value);
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}
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bool mgos_i2c_write_reg_n(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg, size_t n, const uint8_t *buf) {
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unsigned char outbuf[n+1];
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struct i2c_rdwr_ioctl_data packets;
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struct i2c_msg messages[1];
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if (!i2c) {
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LOG(LL_ERROR, ("No I2C bus"));
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return false;
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@ -209,13 +172,18 @@ bool mgos_i2c_write_reg_n(struct mgos_i2c *i2c, uint16_t addr, uint8_t reg, size
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LOG(LL_ERROR, ("Cannot select slave 0x%04x on I2C bus: %s", addr, strerror(errno)));
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return false;
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}
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if (1 != write(i2c->fd, ®, 1)) {
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LOG(LL_ERROR, ("Cannot select register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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return false;
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}
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if (n != write(i2c->fd, buf, n)) {
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LOG(LL_ERROR, ("Cannot write to register 0x%02x on device 0x%04x: %s", reg, addr, strerror(errno)));
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messages[0].addr=addr;
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messages[0].flags=0;
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messages[0].len=sizeof(outbuf);
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messages[0].buf=outbuf;
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outbuf[0]=reg;
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memcpy(outbuf+1, buf, n);
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packets.msgs = messages;
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packets.nmsgs = 1;
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if(ioctl(i2c->fd, I2C_RDWR, &packets) < 0) {
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return false;
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}
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return true;
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@ -229,42 +197,6 @@ struct mgos_i2c *mgos_i2c_get_global(void) {
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return s_global_i2c_bus;
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}
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int get_i2c_register(struct mgos_i2c *i2c, uint8_t addr, uint8_t reg, uint8_t *val) {
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unsigned char inbuf, outbuf;
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struct i2c_rdwr_ioctl_data packets;
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struct i2c_msg messages[2];
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/*
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* In order to read a register, we first do a "dummy write" by writing
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* 0 bytes to the register we want to read from. This is similar to
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* the packet in set_i2c_register, except it's 1 byte rather than 2.
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*/
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outbuf = reg;
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messages[0].addr = addr;
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messages[0].flags = 0;
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messages[0].len = sizeof(outbuf);
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messages[0].buf = &outbuf;
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/* The data will get returned in this structure */
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messages[1].addr = addr;
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messages[1].flags = I2C_M_RD/* | I2C_M_NOSTART*/;
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messages[1].len = sizeof(inbuf);
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messages[1].buf = &inbuf;
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/* Send the request to the kernel and get the result back */
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packets.msgs = messages;
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packets.nmsgs = 2;
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if(ioctl(i2c->fd, I2C_RDWR, &packets) < 0) {
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LOG(LL_ERROR, ("Unable to send data"));
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return 1;
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}
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*val = inbuf;
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return 0;
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}
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// User provided function to interface with Linux I2C driver
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bool mgos_i2c_open(int busnr) {
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int fd;
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@ -24,14 +24,24 @@
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// Public functions follow
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struct mgos_si7021 *mgos_si7021_create(struct mgos_i2c *i2c, uint8_t i2caddr) {
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struct mgos_si7021 *sensor;
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int ret;
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if (!i2c) return NULL;
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// Reset and query register
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ret=mgos_i2c_read_reg_b(i2c, i2caddr, MGOS_SI7021_READRHT_REG_CMD);
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if (ret!=0x3A) {
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LOG(LL_ERROR, ("Chip ID register invalid, expected 0x3A got 0x%02x (%d)", ret, ret));
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return NULL;
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}
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LOG(LL_INFO, ("SI7021 found at I2C 0x%02x", i2caddr));
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sensor=calloc(1, sizeof(struct mgos_si7021));
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if (!sensor) return NULL;
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sensor->i2caddr=i2caddr;
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sensor->i2c=i2c;
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sensor->last_read_time=0;
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return sensor;
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}
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